
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use work.state_pkg.all;

entity map_state_ctrl is
port (clk			: in	std_logic;
		reset			: in	std_logic;
		continu : out std_logic;
		rover_direction : out direction_type;
		
		dbm : out string (2 downto 1)
	);
end map_state_ctrl;

architecture Behavioral of map_state_ctrl is
		
begin
		continu <= '0';
		rover_direction <= STOP;
		dbm <= "  ";
end architecture Behavioral;

